This application is related to a co-pending application that bears Motorola docket number CR97-133 and U.S. Ser. No. 09/144,686, entitled "MAGNETIC RANDOM ACCESS MEMORY AND FABRICATING METHOD THEREOF," filed on Aug. 31, 1998, incorporated herein by this reference and co-pending application that bears Motorola docket number CR 97-158 and U.S. Ser. No. 08/986,764, entitled "PROCESS OF PATTERNING MAGNETIC FILMS" filed on Dec. 8, 1997, incorporated herein by reference.
A magnetic memory element has a structure that includes ferromagnetic layers separated by a non-magnetic layer. Information is stored as directions of magnetization vectors in magnetic layers. Magnetic vectors in one magnetic layer, for instance, are magnetically fixed or pinned, while the magnetization direction of the other magnetic layer is free to switch between the same and opposite directions that are called "Parallel" and "Antiparallel" states, respectively. In response to Parallel and Antiparallel states, the magnetic memory element represents two different resistances. The resistance has minimum and maximum values when the magnetization vectors of the two magnetic layers point in substantially the same and opposite directions, respectively. Accordingly, a detection of changes in resistance allows an MRAM device to provide information stored in the magnetic memory element.
An MRAM device integrates magnetic memory elements and other circuits, for example, a control circuit for magnetic memory elements, comparators for detecting states in a magnetic memory element, input/output circuits, etc. These circuits are fabricated in the process of CMOS (complementary metal-oxide semiconductor) technology in order to lower the power consumption of the MRAM device. The CMOS process requires high temperature steps that exceed 300.degree. C. for depositing dielectric and metal layers and annealing implants, for example.
Magnetic layers employ ferromagnetic material such as alloys of nickel (Ni), iron (Fe) and/or cobalt (Co) that require processing below 300.degree. C. in order to prevent intermixing of magnetic materials caused by high temperatures. Accordingly, magnetic memory elements need to be fabricated at a different stage after CMOS processing.
Magnetic memory elements contain components that are easily oxidized and also sensitive to corrosion. To protect magnetic memory elements from degradation and keep the performance and reliability of the MRAM device, a passivation layer is formed over magnetic memory elements.
In addition, a magnetic memory element includes very thin layers, some of them are tens of angstroms thick. The performance of the magnetic memory element is sensitive to the surface conditions on which magnetic layers are deposited. Accordingly, it is necessary to make a flat surface to prevent the characteristics of an MRAM device from degrading.
Metal lines are employed to produce magnetic fields for writing and/or reading states in a magnetic memory element. Less amount of current is desired to minimize power consumption.
During typical MRAM element fabrication, the top electrode includes a layer of ferromagnetic material such as alloys of Ni, Fe, and/or Co. This layer, although relatively thin, is difficult to etch. Typically, the top electrode is defined using standard ion milling or dry etch, such as reactive ion etch (RIE), techniques which result in over-etch and under-etch problems, in that there is a lack of a proper etch stop. Wet etching will etch isotropically and thus etches the electrode laterally. In addition, a problem exists with uncontrolled side oxidation of the layers from the exposure of the sides and top of the electrode subsequent to etching. This natural oxidation, or thermal degradation, of the sides of the electrode when exposed to air, is dependent upon how long the wafer sits exposed to the air, and the humidity and temperature of the air. These over-etch and under-etch problems, as well as the uncontrolled oxidation of the layers, leads to shorting within the device, variations in the switching field, and degradation of memory cell performance.
Accordingly, it is a purpose of the present invention to provide an improved MRAM device that prevents a magnetic memory element from thermal degradation and etch problems while fabricating the device.
It is another purpose of the present invention to provide an improved MRAM device that includes defined magnetic memory elements.
It is a still further purpose of the present invention to provide a method of forming MRAM device top electrodes by defining insulating and non-magnetic areas around the desired active areas, thereby forming individual MRAM device elements without device degradation.
It is still a further purpose of the present invention to provide a method of forming an MRAM element which is amenable to high throughput manufacturing.